ZXID System (draft)
A downloadable game
The readings would assume the bitmap to be stored in little-endian mode. That is: first read would return a byte with bits 7 to 0 of the 64-bit bitmap, a second read would returns a byte with bits 15 to 8 of the 64-bit bitmap and so on. After the last read, which would returns bits 79 to 72, the next read would return a byte with bits 7 to 0 again.
A write I/O bus cycle to this port with any value will make the bitmap index to reset to the first 8 bits. The value to be written is actually discarded.
A machine may have means to enable or disable features using its own I/O ports. Such changes should be reflected in the returned bitmap immediately.
An HDL description of a hardware module that implements this CPUID-like mechanism will be provided along with the set of current features.
If possible, a discrete chip version, or a CPLD version of this module will be available as well so makers that don't use FPGA to implement their Spectrums may include this as well.
Example of use
ZXID equ FB3Bh ;GetZXIDBitmap. ;Miguel Angel Rodriguez Jodar (mcleod_ideafix). ZX-UNO team. ;This code is released under public domain ; ;Check the ZXID bitmap, if implemented on a ZX Spectrum compatible machine. ;Returns CF clear if succesful and IX points to feature list. CF set if ZXID ;bitmap not implemented and IX doesn't change. ;This routine needs interrupts enabled. It assumes that the first IN A,(C) will ;be executed while the ULA is still drawing the border. ;Registers used: AF,BC,D,HL,IX GetZXIDBitmap ld bc,ZXID out (c),c ;write any value to reset the ZXID ;internal index ei halt in a,(c) ;this instruction should be executed when the ;ULA is not fetching pixels from screen memory bit 6,a ;is ZXID present? scf ret nz ;return if so with CF set ld hl,ZXIDBitmap ld (hl),a ;store saved value read to memory buffer inc hl LoopGetBitmap in a,(c) ld (hl),a inc hl bit 7,a jr nz,LoopGetBitmap ld ix,ZXIDBitmap or a ret ZXIDBitmap db 256 dup(0) ;up to 256 bytes of ZXID information. ;a routine looking for a specific feature ;can stop data retrieval early, to keep with ;the byte containing the desired feature ;to check
After calling this routine, checks can be performed like this:
bit 0,(ix+1); checks whether ULAplus is available
1' (NZ condition) on any of these bits means that the feature or operation
mode addressed by that bit is available. A '
0' indicates that the feature or
operation mode is not available (this last condition can be due to the hardware
not actually supporting the feature, or to a control
register/dipswitch/pinheader that are disabling the feature.
Byte Assigned bit Nmemonic Description 0 0 48K 48K mode (no 128K memory, or locked by bit 5 of 7FFD) 1 128K 128K standard MMU 2 2A +2A/+3 standard MMU 3 48U 48K ULA active 4 128U 128K ULA active 5 AY AY-3-8912 available 6 0 Always 0 7 EOB End Of Bitmap (0=last byte of the bitmap. 1=not last byte of the bitmap) 1 8 UP ULAplus available 9 THI Timex hi-color available 10 THR Timex hi-res available 11 PEN Pentagon ULA active 12 256K 256K capable (Pentagon layout) 13 512K 512K capable (Pentagon layout) 14 TMM Timex MMU enabled 15 EOB End Of Bitmap 2 16 TS Turbo Sound available 17 SPD SpecDrum available 18 COV Covox available 19 GS General Sound available 20 7M 7 MHz capable 21 14M 14 MHz capable 22 21M 21 MHz capable 23 EOB End Of Bitmap 3 24 28M 28 MHz capable 25 56M 56 MHz capable 26 112M 112 MHz capable 27 RAD Radastan mode available 28 ZE0 ZEsarUX mode 0 available 29 ZE1 ZEsarUX mode 1 available 30 ZE2 ZEsarUX mode 2 available 31 EOB End Of Bitmap 4 32 AL2 Alicia 2bpp video modes available 33 AL4 Alicia 4bpp video modes available 34 AL8 Alicia 8bpp video mode available 35 ALA Alicia attribute video modes available 36 ALF Alicia 15 color video mode available 37 0 Reserved 38 ZGX ZEsarUX sprite chip present 39 EOB End Of Bitmap 5 40 0 Reserved 41 TSST TSConf sprites and tiles available 42 1M 1MB capable 43 2M 2MB capable 44 4M 4MB capable 45 TSM TSConf memory manager enabled 46 PMM Prism MMU available 47 EOB End Of Bitmap 6 48 0 Reserved 49 SID SID available 50 SAA SAA1099 available 51 ZRI ZX-UNO raster interrupt available 52 0 Reserved 53 TRI TSConf raster interrupt available 54 DMA ZX-UNO DMA available 55 EOB End Of Bitmap 7 56 ZDM Z80-DMA chip available 57 TSD TSConf DMA available 58 0 Reserved 59 0 Reserved 60 0 Reserved 61 0 Reserved 62 0 Reserved 63 EOB End of Bitmap 8 64 0 Reserved 65 0 Reserved 66 0 Reserved 67 0 Reserved 68 0 Reserved 69 0 Reserved 70 0 Reserved 71 EOB End of Bitmap 9 72 0 Reserved 73 0 Reserved 74 0 Reserved 75 0 Reserved 76 0 Reserved 77 0 Reserved 78 0 Reserved 79 EOB End of Bitmap
Final list of features and assigned bits to be discussed with creators of clone systems and enhanced Spectrums after an HDL description of the ZXID device is designed and tested. Devices that do not respect the ZXI standard will not be included.
The intention is that the list of features to have the most standard features on lower bytes so a cheap implementation (with one or two 8 bit hardwired registers) would be possible to be added as an internal device into original systems, if desired.
The ZXID system is licensed under the ZXI license.
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